Comment by senkora
5 years ago
IIRC from my Computer Architecture class, 28nm is the cheapest per transistor, so it’s stuck around for cases where performance isn’t important.
I don’t think there’s a fundamental reason for that, it’s just a feature of the processes that exist. As you get smaller, the savings from miniaturizing components are outweighed by the need for more complicated equipment.
Cost as in cost passed to the buyer?
I would think opex per transistor is always much lower on smaller processes. Even with higher opex of smaller nodes, the geometry heavily favors smaller nodes.
For digital electronics, yes. But not true for image sensors, since the sensor size (and thus the die size) is fixed. For example, a full-frame CMOS sensor has an imaging area of 36 × 24 mm, regardless of the process node, because full-frame is _defined_ as 36 × 24 mm.
The non-opex costs can also be very significant. This is from a few years ago (https://www.extremetech.com/computing/272096-3nm-process-nod...), but you can significant differences in start-up costs per node.
In addition, it's just going to be harder to get fab time on more cutting edge nodes. Your going to be competing for fab time against bigger competitors with more at stake, and that's going to cost you as well.
Finally, it's only true that the long-run opex per working transistor is lower on smaller processes. Many processes are actually more expensive on a "per working chip" basis at introduction than their predecessors. It's only as process is worked on and improved that the per chip cost (ignoring opex) actually beats the preceding node.
Usually a fab will start shipping product on a process once it's "good enough" - the yields and costs (and therefore profit per unit) is sufficient to make sense (even if it's not necessarily cheaper than the old process).
>Finally, it's only true that the long-run opex per working transistor is lower on smaller processes. Many processes are actually more expensive on a "per working chip" basis at introduction than their predecessors.
Yes, but if there is a design that uses a fixed amount of transistors, then the chip size will be smaller on smaller nodes. So even if there are more defects per transistor on a new/small node, it is possible that the yield per cost (even with more expensive wafers) might be higher.
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