Comment by drtgh
3 years ago
NAND cell modes: SLC 1-bit per cell, MLC 2-bit, TLC 3-bit, QLC 4-bit.
And those cell modes are usually determined by the firmware/hardware controller of the NAND memory.
The more bits stored per cell, the greater is the degradation. SLC-mode requires in average 2.2 times more erase cycles than MLC to achieve the same error rate [1].
So the differences in prices make it look as if some manufacturers are playing with us...
[1] https://www.researchgate.net/publication/254005562_Software_...
PS: QLC-mode is the worst in all terms, the highest degradation and lower speed.
Does it mean that with "raw" flash it's possible to use it in either mode? I guess it should not be impossible to create DIY SSD?
It's essentially charging a cell to a level on write and measuring the voltage on read.
So technically it's up to firmware to decide, assuming the hardware have stuff (ADC/DAC etc.) to handle it would be possible.