Comment by janwas
2 years ago
"Real truth" and "fan boys"? Let's have some facts: there are indeed a boatload of extensions, though perhaps not (yet) to the V extension itself.
T-HEAD [1], Ventana's ternary op [2], Sifive also has a couple [3], including "Xsfvfwmaccqqq", one of at least four completely different matmul variants.
In particular for the latter, I would say fragmentation is an absolutely valid concern at the moment.
[1]: https://github.com/T-head-Semi/thead-extension-spec [2]: https://github.com/ventanamicro/ventana-custom-extensions/re... [3]: https://www.sifive.com/documentation
T-Head also has their own matmul extensions, but t-head, SiFive, Andes, Rivos, IMB, ... have all people working on the risc-v integrated matrix extension spec.
The vendors presented their own matmul extensions, but none of them solve all problems that the integrated matrix extension should solve. Most importantly binary compatibility across vector lengths. The last to meeting presented alternatives that would satisfy that requirement. It will however take some time to decide on and experiment with the best design.
I agree that this can turn out messy, so far I haven't seen anyone, outside of vendor libraries, use the t-head or SiFive matmul extensions in open source code.
Ventanas ternary op and similar will hopefuly consolidate on the cmov extension.
At some point we will get a matmul extension which fit- a good set of compromises/use cases.
(there are still people thinking there will be no tradeoff).
cmov extension? Like on x86?
I agree the situation changes if there is a single new spec, this is why I wrote "at the moment". Do you have any insight on when it's finished/ widely available? I'd guess two years?
Indeed, vendor extensions are no fragmentation of the ratified and frozen extensions.
The real signficant and annoying fragmentation is 32/64 bits (accutely painful on x86).
hm, from my point of view, "here are 4+ different ways to do it, depending on which CPU you are running on" sure sounds like fragmentation.
Perhaps embedded systems engineers see things differently if they know exactly what CPU they are going to target.
32/64 bits? It's been years since we dropped support for 32-bit x86 :)
ask valve