Comment by foldr

Probably true now, but in ye olde days, some instructions existed primarily to make assembly programming more convenient.

Assembly programming is a real pain in the RISCiest of RISC architectures, like SPARC. Here's an example from https://www.cs.clemson.edu/course/cpsc827/material/Code%20Ge...:

• All branches (including the one caused by CALL, below) take place after execution of the following instruction.

• The position immediately after a branch is the “delay slot” and the instruction found there is the “delay instruction”.

• If possible, place a useful instruction in the delay slot (one which can safely be done whether or not a conditional branch is taken).

• If not, place a NOP in the delay slot.

• Never place any other branch instruction in a delay slot.

• Do not use SET in a delay slot (only half of it is really there).