Comment by stkdump

Direct reading without the risk of reading incorrect values is possible only when the timer is implemented using a synchronous counter instead of an asynchronous counter and the synchronous counter must be fast enough to ensure a stable correct value by the time when it is read, and the reading signal must be synchronized with the timer clock signal.

Synchronous counters are more expensive in die area than asynchronous counters, especially at high clock frequencies. Moreover, it may be difficult to also synchronize the reading signal with the timer clock. Therefore the second solution may be preferable, which uses a separate capture register for reading the timer value.

This was implemented in the timer described in TFA, but it was done in a wrong way.

The capture register must either ensure that the capture is already complete by the time when it is possible to read its value after giving a capture command, or it must have some extra bit that indicates when its value is valid.

In this case, one can read the capture register until the valid bit is on, having a complete certainty that the end value is correct.

When adding some arbitrary delay between the capture command and reading the capture register, you can never be certain that the delay value is good.

Even when the chosen delay is 100% effective during testing, it can result in failures on other computers or when the ambient temperature is different.