Comment by orlp
2 days ago
What I don't understand is why it took you 8 weeks to distinguish a timer from a transistor. That doesn't make your professor's reaction alright, I just find it puzzling.
2 days ago
What I don't understand is why it took you 8 weeks to distinguish a timer from a transistor. That doesn't make your professor's reaction alright, I just find it puzzling.
It's a good question! I didn't think to check the markings on the chip. The lab tech was convinced I was doing something wrong with my setup, and likewise he had me convinced it must be something wrong with my setup.
Coincidentally, I've been knee-deep in some problems that I've applied the Cynefin framework to. I'd call this problem "chaotic", where throwing things at the wall might be _more_ effective than working down a suggested or tried-and-true path from an expert. I was pleasantly surprised just a few weeks ago where one of the more junior engineers on my team suggested updating a library - something I hadn't considered at all - to fix an issue we were having. (That library has no changelog; it's proprietary / closed source with no public bug tracker.) Surely enough, they were right, and the problem went away immediately - but I was convinced this was a problem with the data (it was a sporadic type error), not a library problem.
No offense, but... when I was reading your story, I was somehow at least assuming that the marking on the part was somewhat unreadable or something...
After getting befuddling answers, would it not have been natural to check the base assumptions, starting with do I have the correct part? That is true as much in the "real engineering" world, as in school.
You say "It could _never_ be the equipment's fault" as if it was, but it wasn't. The test equipment gave you correct answers, your device under test was wrong.
I'd say it's not natural to check for the correct part that has been given to you by an authority that claims to have done so, but a learned problem solving technique.
Or even more likely in a lab setting: have another student test your part in their setup for A/B validation testing.
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That would be like exposing a first year CS student to a situation where "it could be a compiler bug" is one of the potential explanations.
It's closer to exposing a first year CS student who has never touched a computer before to Windows, when the work is supposed to be done on Linux, and the TA is hemming and hawing, and insists that the reason the sudo command isn't working is because the student is not following the steps correctly.
It's a problem that's obvious to diagnose... If you already have passing familiarity with the material. Most people do not have passing familiarity with electronic components when they step into an engineering program.
The part was marked as a timer IC.
Not just a timer IC. Literally the most common IC in the world for at least every year from 01980 to 02000 or so, maybe still today. I can understand the first-year student not recognizing it, but what the fuck was the lab tech's mental disability?
I would assume that you don't have access to the lab(and diagnostic equipment) at all times and taking other classes.
Also him being a student, having the wrong component was probably not in his mental troubleshooting tree. I would guess that it was not in the lab assistant's troubleshooting tree either.
Also once you start down the road of troubleshooting, a false trail can lead you far into the woods.
Same package. 555 is typically a DIP-8, transistor packages are available in the same. So you would have to examine the cryptic markings and compare them with the other students, and that’s only if you suspected some fuckup on the part of the knowledgeable people.
ALWAYS suspect some fuckup on the part of the knowledgeable people... especially them!
Trust, but verify.
Yes, my strict adherence to “trust but verify” was born from literal tears. It’s not worth trusting others if it takes a small fraction of the projects time to verify. It has saved me incredible amounts of time in my professional life, and I’ve seen months wasted, and projects delayed, by others who hadn’t cried enough yet.
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"Trust, but verify" is just a polite (ie corporate) way of saying "Don't trust until you verify", right?
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But that's the thing that both students and often the teachers forget. We don't run labs to go smoothly, we run labs because you'll have to troubleshoot. There is no learning experience in a lab that works without issues, in fact IMO if lab instructions are of the step by step type, they should always have some deliberate errors in it to get students to troubleshoot.
To play devil's advocate, just imagine the previous posters Story at a company, i.e. a junior engineer not being able to make some simple tasks work and telling their supervisor "it doesn't work" and it turns out after 8 weeks they grabbed some wrong part. Should they have expected their supervisor to check all the parts? Should they expect a good performance evaluation?
If after eight weeks a junior engineer is still toiling on their story, I'd ask why someone more senior didn't get involved.
There are lots of reasons - maybe the senior engineers are overburdened with other work (or don't care), maybe the project manager or team lead wasn't asking if the junior needed help, or maybe the junior was lying about their progress.
Either way, a story that goes for eight weeks feels excessive. Much, to your point, taking eight weeks to figure out that there was a bad part feels excessive. My counterpoint is that teams don't typically operate like labs. In a college lab, the objective is for you, specifically, to succeed. In an engineering team, the objective is for the entire team to succeed. That means the more senior engineers are expected to help the more junior engineers. They might directly coach, or they might write better documentation. I don't believe that dynamic is present in a lab setting.
> Should they expect a good performance evaluation?
They should expect that particular incident to not affect their performance evaluation, since it was very much not their fault.
In your hypothetical scenario, your hypothetical junior engineer went to the senior engineer repeatedly for advice, and the senior engineer did not do their job properly:
The lab tech was unhelpful, insisting that it must be something with how I had it wired, encouraging me to re-draw my schematic, check my wires, and so on. It could _never_ be the equipment's fault.
This is a huge failure in mentorship that wouldn't be ignored at a company that actually cares about these things.
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For a college class grade, everyone is supposed to be tested on the same exercise. If all students were tested under the same scenario then it would be fair. For just one student to be tested under this scenario, but for all other students to get a free pass on the lab component identification diagnostic test, is not reasonable.
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While it's ridiculous to expect a student to have the skills of a professional, even a student needs to develop assertive skills to demand a replacement part. This is a basic skill for debugging hardware problems: see if problem manifests on more than one unit. Here it would be demanding another chip to try, early-on. Chips can be marked correctly but damaged or defective.
> "But that's the thing that both students and often the teachers forget. We don't run labs to go smoothly, we run labs because you'll have to troubleshoot."
Hands up everyone who remembers being taught that labs were supposed to go wrong and you were doing them because you will have to troubleshoot?
... anyone?
... anyone?
... Bueller?
Or is this just the typical internet John Galt like that other guy "no offense but why didn't you just already know everything and create an apple pie by creating the universe like I would have?"
Ohm lordy, we're blaming the student for not having years of homebrew experience before he entered school? Sure any hobbiest knows what a 555 is, but when the lab assistant doesn't even catch it and the chip was handed out to the student this is not an entry-level students fault.
relatively cheap lesson in the importance of knowing your hardware.
You can create a timer with one transistor and an LC feedback loop.