It's interesting how arbitrarily CPU bitness is defined. Sometimes it's the register size, sometimes data bus width and sometimes the address width.
6502 has 8 bit registers, 8 bits wide data bus, and 16 bit addresses. Only PC register is 16-bit, but 6502 does have a zero page indirect 16-bit addressing mode.
Yea, I was thinking about the address width, but I guess it’s really an 8-bit accumulator width. LOL, and I used to hack 6502 assembly language when I was a kid. As I get older, I’m starting to understand the term “senior moment.”
It's interesting how arbitrarily CPU bitness is defined. Sometimes it's the register size, sometimes data bus width and sometimes the address width.
6502 has 8 bit registers, 8 bits wide data bus, and 16 bit addresses. Only PC register is 16-bit, but 6502 does have a zero page indirect 16-bit addressing mode.
Sometimes by register size, sometimes by ALU size, sometimes by data bus width. But I've never heard of a CPU bitness defined by address bus size.
Yea, I was thinking about the address width, but I guess it’s really an 8-bit accumulator width. LOL, and I used to hack 6502 assembly language when I was a kid. As I get older, I’m starting to understand the term “senior moment.”