Comment by perihelions
9 hours ago
I wonder if there could be some way to photolitograph compute circuits directly onto a radiator substrate, and accomplish a fully-passive thermal solution that way. Consider the heat-conduction problem: from dimensional analysis, the required thickness of a (conduction-only) radiator plate with a regular grid of heat sources on it shrinks superlinearly as you subdivide those heat sources (from few large sources, into many, small ones). At fixed areal power density, if the unit heat source is Q, the plate thickness d ∝ Q^{-3/2}. (This is intuitive: the asymptotic limit is a uniform, continuous heat source exactly matched to a uniform radiation heat sink; hence heat conduction is zero). So: could one contemplate an array of very tiny CPU sub-units, grided evenly over a thin Al foil—say at the milliwatt scale with millimeter-scale separation? It'd be mostly empty space (radiator area) and interconnect. It'd be thermally self-sufficient and weigh practically nothing.
Look at the thermal shield design for the JWST. Could you have a data center that unfolds into a multi-layered plane where the outer solar collector layer faces the sun, an intermediate layer shields infrared emissions from the back side of that, and the final layer that always faces away from the sun holds (or is) a bunch of chips? Park it in an orbit where it can stay oriented this way or an L point. Free compute for the life span of the chips powered by the sun.
A lot of these is a supercomputing Dyson swarm.
Also do chips in space need casing or could the wafers be just exposed on that back layer?
I understand that the multi-layer insulation idea doesn't accomplish much unless you're trying to reach deep cryogenic temperatures passively (as infrared telescopes do!) It's a difficult structural design which would only cut your heat budget by a small constant factor. Remember that much of that heat on the solar side is making its way over to the cold side by way of electricity—the compute units are a heat "source" of similar magnitude as the solar input itself.
edit: I think the optimal packing could be a simple rolled-up scroll, that unfurls in space into a ribbon. A very lazy design where the ribbon has no orientation control, randomly furls and knots; and only half of it is (randomly) facing the sun at any given time. And the compute units are designed work under those conditions—as they are to be robust against peers randomly disappearing to micrometeorites, to space radiation, and so forth.
Because, you could make up for everything in quantity. A small 3x5 meter cylinder of rolled-up foil stores—at the mm-thickness scale, 10's of gigawatts of compute; at the micron scale, 10's of terawatts. Of course that end is far-future sci-fi stuff!
> Also do chips in space need casing or could the wafers be just exposed on that back layer?
Even in LEO they benefit tremendously from radiation shielding, even a couple millimeters of aluminum greatly reduces the total ionizing dose. Also LEO has the issue of monatomic oxygen in the thermosphere which tends to react aggressively with the surface of anything it touches. An aluminium spacecraft structure isn't really affected, but I don't think it'd be very good for a semiconductor wafer.