Comment by ai-christianson
6 months ago
> It’s amazing that this worked at all, but to be clear this layout is actually very bad. Just look at that minimum width trace used to carry power across the entire board and into the ESP32. Using min width traces and wrapping them and min clearance to components is a classic mistake of people (or LLMs?) that have zero understanding of PCB layout techniques beyond “draw lines until everything is connected”
Is it really so implausible that these constraints could be built into the process/algorithm/agentic workflow?
No, but at that point, why even leverage a stochastic text generator? Placing hard constraints on a generative algorithm is just regular programming with more steps and greater instability.
Edit: Also, one could just look to the world of decision tree and route-finding algorithms that could probably do this task better than a language model.
IDK, modeling, constraints, simulations and stochastic processes seem like a match made in heaven.
It's like how pairing a coding agent that can run unit tests and iterate is way more powerful than code gen alone.