Comment by sylware
12 hours ago
I have been using only basic RISC-V core machine instructions: the interpreter is beyond stupid, I did write it directly in x86_64 assembly.
12 hours ago
I have been using only basic RISC-V core machine instructions: the interpreter is beyond stupid, I did write it directly in x86_64 assembly.
Oh ok. I have been trying to write emulator and validating if instruction is correctly implemented in my code has been biggest pain point for me as I have no idea to get reference in something like instruction - opcode - context before execution - context after execution.
Only thing which I have come up with is just step through the instructions on the MCU using compiled output from yarpgen, but problem here is that it wont generate code variable enough to test all the instructions, so there are going to be blind spots like i.e. float divisions, SIMD instructions etc.
https://github.com/intel/yarpgen