Comment by mikewarot
2 days ago
An FPGA is like a spreadsheet for bits that can recalculate at hundreds of millions of times per second.
It's a declarative programming system, and there's a massive impedance match when you try to write source code for it in text. I suspect that something closer to flow charts, would be much easier to grok. Verilog is about as good at match as you are likely to get, if you stick with the source code approach to designing with them.
Very good metaphor. I'm going to use that in the future. It even has rows and columns.
Except the spreadsheet is a really accessible technology that's been cloned, while the critical problem with FPGA is the proprietary tooling. This is the same reason that NVIDIA made a gazillion dollars by turning GPUs into general purpose compute: a proper API, CUDA.