Comment by zozbot234
1 day ago
NPUs are a separate accelerator block, not in-CPU SIMD. The latter exists for matrix compute, but only in the latest version of AVX which has yet to reach consumer CPUs.
1 day ago
NPUs are a separate accelerator block, not in-CPU SIMD. The latter exists for matrix compute, but only in the latest version of AVX which has yet to reach consumer CPUs.
> The latter exists for matrix compute, but only in the latest version of AVX which has yet to reach consumer CPUs.
As far as I am aware, AMD implemented has implemented many parts of AVX-512 in their consumer CPUs since Zen 4:
https://en.wikipedia.org/w/index.php?title=AVX-512&oldid=133...
On the other hand, Intel still does not support AVX-512 in Raptor Lake, Meteor Lake and Arrow Lake:
> https://en.wikipedia.org/wiki/Raptor_Lake
> https://en.wikipedia.org/wiki/Meteor_Lake
> https://en.wikipedia.org/wiki/Arrow_Lake_(microprocessor)