Comment by klodolph

I’m mostly just curious about how people use LLMs to learn. I don’t know what your goals are, and even if your goals were the same as mine, I don’t know how LLMs stack up against the way I learned (mostly from books). At least, not long-term. I’m not that good at electronics, I’m just a hobbyist that went through Forrest Mims mini-notebooks and later Horowitz and Hill.

What I like about information from humans is that humans are always trying to figure out how to say things that are relevant and informative. By “relevant”, I mean that we try to avoid saying things that don’t help you. By “informative”, I mean that we try to include information that you want to know, even if you didn’t specifically ask for it.

Picking on the chat for a moment—when you started out with the question, my first thought was, “This person is specifically asking about HC versus HCT, but maybe they want a broader overview of logic families, and maybe they want to understand which logic family to pick for their hobby project.” That’s an example where I think ChatGPT could have identified something that you wanted to know, but didn’t. (It wasn’t as informative as it could have been.)

Then there’s some times that ChatGPT gave you information of dubious relevance.

> Important: On the HCT125, the enable is active-LOW.

I don’t think that’s contextually important. It’s like saying, “Important: On the Honda Civic, the gas tank is on the left.” That’s contextually important when you’re at the gas station, but not when you’re buying a car.

I’m not sure why the LLM is recommending the TTL-compatible chips. IMO, the right thing to do here is probably to run everything at 3.3V, unless you have something that specifically needs 5V. When everything is at 3.3V, you don’t have to think about level shifting and you can just pick a very boring logic family like AHC. But I don’t know what you’re building. Likewise, I would lean towards using normal CMOS logic levels, unless I had a specific reason to choose TTL-compatible. The regular CMOS versions have better noise margin, because the threshold is in the optimum place—right in the middle.