Comment by generuso

In the "real" DRAM chip, there is a large array of very tiny capacitors, with the switches which allow to connect one row of the array at a time to the readout column wires.

The capacitance of the wires themselves is typically an order of magnitude greater than that of the storage capacitors. So when the memory is read, the wires are first precharged to some standard voltage. Then the desired row of storage capacitors is connected to the wires, and the charges from the storage capacitors spread onto the wires, changing their voltages very slightly. These voltage deviations from the standard value are amplified by the "sense amplifiers". The amplifiers are sort of like flip-flops. Once they start in a state which "tilts" slightly to "zero" or slightly to "one", they go all the way to the full magnitude zeros and ones. This not only amplifies the signal, but also automatically brings the voltages on the wires and the still connected to them capacitors to the full magnitude, thus "refreshing" the data. The row is disconnected, and the next read cycle can start for some other row.

In the video, an array of 4x5 capacitors and the associated with them switches was fabricated. The capacitors in the video are several hundred times larger (12400 fF) than typical capacitors in a 64 Kbit DRAM (about 50 fF). I assume this is done so that in the later episodes the author could implement the readout electronics outside of the chip.