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Comment by kens

1 day ago

Author here if anyone has questions...

When you say that the 125 added memory management, what does that mean a little more specifically? My guess is either PDP-11/z280 style paging without page tables (the 16 bit address space makes just having enough IO registers to cover the address space tractable) or some simple segmentation hardware, but it'd be neat if there was another hardware object capability system I didn't know about.

  • The Mitra 125 had memory segmentation. It seems similar to the 8086, with descriptors that specified base address and length for a segment. Accessing memory outside a segment caused a trap.

Do we know anything about the software that ran on it? What language it was developed on, what host platform was used for development, etc? Does any of the code survive?

What frequency did it it cycle at? Any idea how many instructions per second it could process?

  • I don't know what the clock speed was, but it performed about 525,000 addition instructions per second. (1.9µs addition time)