Comment by mycall
1 day ago
How does it compare to something like VexRisc [0] with respect to its capabilities? I know having x86 support is a metric all by itself.
1 day ago
How does it compare to something like VexRisc [0] with respect to its capabilities? I know having x86 support is a metric all by itself.
No contest really: RISCV is a much better ISA, VexRISC is a hyper-optimised implementation of it (for FPGAs), and it's not hindered by trying to be microcode compatible.
The roughly equivalent VexRISC configuration (full with MMU) is only 2736 LUTs, running at 124 Mhz (on Cyclone V, which I'm pretty sure is the same arch)