Comment by phire

No contest really: RISCV is a much better ISA, VexRISC is a hyper-optimised implementation of it (for FPGAs), and it's not hindered by trying to be microcode compatible.

The roughly equivalent VexRISC configuration (full with MMU) is only 2736 LUTs, running at 124 Mhz (on Cyclone V, which I'm pretty sure is the same arch)