Comment by NooneAtAll3
1 day ago
I keep seeing comments here saying that a)compressed instruction are awful for pipeline decode, so they aren't used in any ISA on fast speed and b)risc-v loses in code size if you compare against compressed instructions
I don't understand how the two viewpoints fit together
> I don't understand how the two viewpoints fit together
Well, they don't and they do. Linux runs on everything from an $8 generic IP camera to the world's fastest supercomputers.
RISC-V is attempting to achieve the same feat in hardware, so there will be many implementations at many price points.
As with any of the T-shirts that list 3 things and say "Pick two" it's always difficult to reduce cost, increase speed, and decrease code size.
But...
You can pick two.
So if you don't mind spending the money for things like fancy micro-op caches, you don't care about the compressed decode, and you can still make it run like a bat out of hell with compressed instructions.
Or if you don't mind lower performance, you don't worry about fusing operations, and the pipeline implications aren't so bad, so you can still make something cheap that works with compressed instructions.
It's only when you're trying to pick all 3 (compressed instructions, high instruction throughput, and low cost) that the difficulty of decompressing the instructions becomes problematic.
Or look at it this way. x86 decode is infinitely more complicated than RISC-V decode, and still occupies maybe 2% of the die area.