Comment by bsder

Because the people driving the RISC-V ISA all care about delivering IP and not chips and, as such, only care about the high end portion of the market.

The problem is that RISC-V is never going to win at the high end. RISC-V will never have as much money driving it forward as x86 and ARM. As such, the blocks and integration will always lag.

The portion of the market which RISC-V could dominate is the low-end (you know ... the same way ARM climbed up the ladder?) and nobody in charge of RISC-V cares because you have to actually ... SHIP FREAKIN' CHIPS ... and that's, you know, so icky.

And this is the disconnect. Low-end embedded has a bunch of needs and the RISC-V architecture completely whiffs on many of them and has active misfeatures on others while having very little that is actively good in that space.

And many of us are angry about this. It didn't have to be this way.