If it used the edge of the PCB to build a USB-C port you could have added a USB-C plug to your PCB and inserted this module like a compute module and used the majority of the pins for GPIO.
But in this form it is kinda useless except as a hobby.
If so, here's a nice and simple project idea: that board with two USB connectors and connect it to the two ends of the same cable; you send a pseudorandom bitstream down one end and verify if it comes out correctly at the other end and report the bit error rate (USB cable tester)
looks like it only has the physical connections for USB 2. Fun fact about usb 3, it’s really a completely separate physical standard from usb 2, just designed in such a way that a single port can have BOTH usb 2.0 and 3.0 connectors in it at the same time. In theory this would allow for devices to use the full bandwidth of 3.0 + the full bandwidth of 2.0, but as far as I know no device does that.
What do people do with these? I'm struggling to think of any use-case where someone would need a tiny FPGA in a USB port.
If it used the edge of the PCB to build a USB-C port you could have added a USB-C plug to your PCB and inserted this module like a compute module and used the majority of the pins for GPIO.
But in this form it is kinda useless except as a hobby.
But is it fast enough to do USB 3?
If so, here's a nice and simple project idea: that board with two USB connectors and connect it to the two ends of the same cable; you send a pseudorandom bitstream down one end and verify if it comes out correctly at the other end and report the bit error rate (USB cable tester)
looks like it only has the physical connections for USB 2. Fun fact about usb 3, it’s really a completely separate physical standard from usb 2, just designed in such a way that a single port can have BOTH usb 2.0 and 3.0 connectors in it at the same time. In theory this would allow for devices to use the full bandwidth of 3.0 + the full bandwidth of 2.0, but as far as I know no device does that.
> In theory this would allow for devices to use the full bandwidth of 3.0 + the full bandwidth of 2.0, but as far as I know no device does that.
Not as a single device (no XHCI controllers allow this), but yes if you presented two devices to the OS (with some XHCI controllers.)
Apparently there is a newer Qomu device that combines the FPGA and an MCU: https://www.crowdsupply.com/quicklogic/qomu
Its a cool board! Second submission on it ~7 years ago got a tiny bit of traction. https://bsky.app/profile/mith.ro
[dead]