Comment by westurner

TIL MLIR supports sparse tensors with sparse_tensor.encoding = { dense, compressed, specialized structures for hypersparse regions, and hardware-specific sparse constraints, such as NVIDIA's 2:4 structured sparsity layout }

But it looks like [MLIR and all other implementations of] SIMD only accept vectors; so there can't be Zero-Copy there because the tensor must (?) be copied to a vector to pass to a SIMD e.g. matmul routine, and then the resultant vector must be copied back into a tensor only if there are subsequent references to the complete tensor instead of just a slice?

FWIU, AFAICS, GPUs are designed for 3x3 tensors (and affine transformation to 2D) but for greater degrees like for 4x4 tensors (e.g. for SQG) you must implement shaders?