Comment by PragmaticPulp
3 years ago
Interesting design. They use FPGAs to emulate NAND storage with DDR, then use a standard NAND SSD controller.
It doesn't perform any better than fast NVMe SSDs for larger, sequential operations. However, it appears to be an order of magnitude faster for the random 1K read/write operations.
It also has infinite durability relative to an SSD, though obviously your data isn't infinitely durable during a power outage scenario. Would be helpful to know how long that battery can keep it backed up.
Would be interesting if there would be a case for slapping an SSD on the back of it and giving it just enough capacitor power to dump whatever is on RAM to the SSD once a power-out happens (and restore upon boot). SSD writes would be super low (rarely) and only happen during power issues or shutting it all down.
I can see this being great as an ephemeral OS disk. I would selectively sync the changes I want to keep, either to a local SSD, or even over a 10Gbps network, which would update the static image used for booting. It's kind of great knowing that a reboot would give you a fresh system, and at these speeds the system would _fly_.
>> infinite durability relative to an SSD
Until the FPGA dies. Consumer-grade arrays are not eternal. Many have lifespans (>5% failure rate) as low as 2-5 years under regular use.
Is the failure rate higher than other kind of chips? And if so what is the reason that happens?
Any references on this? Googling didn't let me believe this. From my interpretation (maybe wrong) of Xilinx UG116, FPGAs are reliable.
Perhaps durability can be clarified as infinite write endurance, which it has.
> Would be helpful to know how long that battery can keep it backed up.
They say: It has a built-in LiPo and stores your data for up to a year.
Speaking of durability, this has a very interesting characteristic that I very much like. Unlike an SSD, DRAM has inherently very poor data durability and it is very easy and fast to erase anything. Unfortunately, since they are using a SSD controller, this might still not do what I expected it to do, but one of the big problems with SSDs is you cannot delete anything once written. You can secure erase all of the drive, but not just a few files, you only have the manufactuerer respecting TRIM.
The hope here is that because this controller uses DRAM, the contents of the drive can truly be erased quickly on command, while leaving other data intact.
One use case for this would be systems where file level encryption is untenable, but data can potentially be recorded that you would like to cryptographically remove. It would also provide plausible deniability for erasure of contents.
But it must suffer from rowhammer.
I was wondering about that too, maybe they are relying on ECC memory to patch those over. The main page doesn't say, but in one of the comments here it says ECC memory is supported.
https://ddramdisk.store/2023/01/19/the-ddr4-pcie-x8-lady-has...
NAND also suffers from read disturbance; since they are emulating NAND devices, it seems reasonable to assume the FTL in the controller will be tracking reads as well as writes and refreshing blocks accordingly.