Comment by kjs3

3 years ago

It wouldn't be mechanically possible to support multiple generations[1]. That's not the only issue with mixing generations.

There are also some interesting electrical engineering problems around driving the bus as you add more SIMMs; probably need multiple CPLD/FPGA memory controllers beyond a certain point. Clocking gets interesting as well. Not impossible, just complicated for an amateur; I know I have problems getting thing to work reliably over 33MHz or so.