Comment by sylware
2 years ago
x86_64? Seriously?
I would understand if that would be for legacy support, like x86_64 decoded to risc-v.
2 years ago
x86_64? Seriously?
I would understand if that would be for legacy support, like x86_64 decoded to risc-v.
The article missed out on context. The chip runs LoongSon's own "LoongArch" ISA which they had developed out of MIPS'. Chips and Cheeses test programs are written in that ISA. There are other articles on the site that tell more about it.
LoongSon does however supposedly have a instruction set extension for running binary-translated x86 code faster (and ARM and RISC-V), but they have not published much about it.
Since RISC-V has also its roots in mips, maybe loongson should move to RISC-V for good with a x86/arm hardware translater.
All that to run binary distributed x86 apps...
Today I agree that it would make much sense for LoongSon to jump on the RISC-V bandwagon.
However, designing a CPU takes years. Back when they transitioned from MIPS to LoongArch, RISC-V wasn't mature enough to have all the functionality that their MIPS cores did. There was no ratified Bitmanip extension and it was unclear what kind of vector extension that it would get.
Unfortunately, RISCV is really a mess right now, the Vector extensions are horrible. Amusingly, LoongArch has better Linux support than RISCV right now too... Would've definetly been nice to see them adopt RISCV though. ISAs are fragmented enough as is.
11 replies →