Comment by sylware
2 years ago
Since RISC-V has also its roots in mips, maybe loongson should move to RISC-V for good with a x86/arm hardware translater.
All that to run binary distributed x86 apps...
2 years ago
Since RISC-V has also its roots in mips, maybe loongson should move to RISC-V for good with a x86/arm hardware translater.
All that to run binary distributed x86 apps...
Today I agree that it would make much sense for LoongSon to jump on the RISC-V bandwagon.
However, designing a CPU takes years. Back when they transitioned from MIPS to LoongArch, RISC-V wasn't mature enough to have all the functionality that their MIPS cores did. There was no ratified Bitmanip extension and it was unclear what kind of vector extension that it would get.
Unfortunately, RISCV is really a mess right now, the Vector extensions are horrible. Amusingly, LoongArch has better Linux support than RISCV right now too... Would've definetly been nice to see them adopt RISCV though. ISAs are fragmented enough as is.
> the Vector extensions are horrible
How so?
They're horribly fragmented (there's many ISA extensions that accomplish the same thing from different companies), and thus a headache to deal with for any compiler (which is why the compiler support sucks).
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