Comment by bregma
2 days ago
If you disasembled the ROMs you'd find they're filled with BLWP/RTWP instructions. That's how subroutines were executed: Branch and Load Workspace Pointer. The BLWP instruction would load the WP and PC from the next two words and save the current WP/PC/SR into the new R13/14/15. RTWP would restore R13/14/15 into WP/PC/SR. The end result was a stack implemented as a linked list instead of a contiguous array. A lot of the subroutines in ROM just read/wrote tokens from/to the VRAM and then interpreted them as BASIC.
Back when I lived in Texas and they started doing vanity plates, I applied for the plate "BLWP" (I lived in D/FW and visited Lubbock from time to time, so there was a non-zero chance someone driving by would get it.) After waiting a month, I got the letter from the DPS... no... someone beat me to it. So I guess there were at least two fans of the 990's memory-to-memory architecture out there.