Comment by MobiusHorizons

1 year ago

At least in CMOS, the power supplied to the transistor is not being modulated as part of logic operations. Modern hardware does clock gating and power gating of modules for power saving, but that is not what the OP is talking about.

In hardware the equivalent of a ternary is a mux, which can be made from a lot of parallel instances of

   out0 = (a0 & cond) | (b0 & ~cond)

Or in other words, both branches must be computed and the correct value is chosen based on the condition.

"Power" was very sloppy language on my side. I was talking about the low voltage / high voltage difference that you get from transistors. A logical gate ultimately has a single output voltage based on its inputs. If its inputs are 1 and 1 (+5V and +5V), its output will be, say, 0 (0V), not "initially both 0 and 1, but later only 1 is chosen".

Similarly, a two bit adder is not going to have all 4 possible states internally or for some time - as soon as the input voltage is applied to its inputs, its output voltages will correspond to the single result (disregarding the analog signal propagation, which I assume is not what you were talking about).

Similarly, a conditional jump instruction will not be implented natively by computing both "branches". It will do a single computation to set the instruction pointer to the correct value (either current + 1 or destination). Now sure, speculative execution is a different matter, but that is extra hardware that was added late in the processor design process.

  • You can’t really conditionally compute something in hardware. The hard to do the computation exists and is wired up always.

    The conditional jump is a great example actually. Typically this would be implemented by having one block compute PC+<instruction size> and another block compute the jump target and then choosing between the two using a mux

    • That is one way of implementing such conditionals in hardware, but it's just one aspect of the computation. First, we can both agree that in the next clock cycle, a single instruction will be executed, not both instructions that could result after the jump - so clearly the hardware doesn't always do both things.

      Secondly, if we think about the instruction decoding itself, it should become pretty clear that even if the hardware of course always exists and is always going to output something, that's not equivalent to saying it will compute all options. If the next instruction is `add ax, bx`, the hardware is not going to compute both ax + bx and ax - bx and ax & bx and ax | bx and so on, and then choose which result to feed back to ax through a mux. Instead, the ALU is constructed of logic gates which evaluate a single logical expression that assigns each output bit to a logical combination of the input bits and the control signal.

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