Comment by Fiveplus

For the past month, I've been building a distributed, phase-coherent clock synchronization system over standard consumer 2.5GbE copper, bypassing the need for dedicated white rabbit hardware.

It started as a way to fix audio drift in my multi-room setup without using large jitter buffers, but it turned into a standalone project where I started learning more about NIC driver latency. I found that if you isolate a specific CPU core (isolcpus), disable all interrupt coalescing and busy-poll the RX ring buffer with a custom AF_XDP socket, you can characterize the PHY and PCIe bus latency jitter to within a standard deviation of few ns on generic realtek hardware.

I'm using this disciplined clock to do TDOA (time difference of arrival) triangulation of RF signals inside my home. I have three anchor nodes running this stack connected to SDRs. I can currently track the physical location of my dog's collar to within 15cm in 3D space by correlating the signal peaks. The hardest part is writing the solver for the multipath interference. I'm implementing a custom unscented kalman filter to reject the signal reflections bouncing off my refrigerator and radiators. I know what you're thinking. Yes, it sounds totally excessive but getting sub-microsecond synchronization without an FPGA switch feels like magic.