Comment by Neywiny
20 hours ago
Yes. Let's do the math. The fastest sd cards can read at around 300 MB/s (https://havecamerawilltravel.com/fastest-sd-cards/). Modern GPUs use 16 lanes of PCIe gen 5, which is 16x32Gb/s = 512Gb/s = 64 GB/s. Meaning you'd need over 200 of the fastest SD cards. So what you're asking is: is there a reason GPUs don't use 200 SD cards? And I can't think of any way that would work
SD is obviously the wrong interface for this but "High Bandwidth Flash" (stacked flash akin to HBM) is in development for exactly this kind of problem. AMD actually made a GPU with onboard flash maybe a decade ago but I think it was a bit early. Today I would love to have a pool of 50GB/s storage attached to the GPU.
First gen HBF is targeting something like 1.2 TB/s!
Oh definitely. The AMD past product just stuck 4x m.2 slots onto the board. Today that approach would be 50-60 GB/s read speed which would be useful enough for something that any of the vendors could build with existing components.
One thing to note, those aren't the fastest SD cards, those are the fastest UHS-II SD cards. The future is SD Express and you can already get microSDs at 900 MB/s.
SD expires cards are still on my watch list after seeing this https://www.theverge.com/2021/9/9/22665216/sd-express-card-s.... But even then, that's only 3x faster, so you're still putting down 71 ish (I think my original number was 213.33) cards, which means 71 PCIe PHYs and NVMe stacks.
Some years ago I realized that if I had oodles of money to spend I would totally get someone to make a PCIe card with like several hundreds microSD cards on it.
You can buy vertical microSD connectors, so you can stack quite a lot of them on a PCIe card. Then a beefy FPGA to present it as a NVMe device to the host.
Goal total capacity, as you can put 1TB cards in there. And for teh lulz of course.
This isn't a very difficult thing to build, but I am curious - what's the point? Who is the market?
The main point would be teh lulz as mentioned, and the market would be me. You know, just because it's possible.
Physically easy to build, main challenge for me would be FPGA implementation.