This question bothers me because I have never found a clear authoritative documentation.
The more detailed sources say, contra the mainstream impression, that Apple Silicon's vaguely-named "unified memory" is technically a hybrid System-on-Chip and System-in-Package architecture. The memory banks DRAM are on a second die (one source said it is made by Samsung), but the RAM controller sits on the CPU die and manages the RAM for the unified memory pool for graphics/main/neural memory usage (hence, "unified" from an ISA perspective). Both IC dies coexists on a shared enclosed package as a single microchip. Technically this is still called a System-on-Chip architecture according to Wikipedia because the electrical engineering definition allows for some parts, such as RAM or I/O, to still exist separately off the main piece of silicon die yet still be called an SoC architecture. In short, it is not a monolithic SoC.
I have tried several times to find citations about this but it is an ambiguous point that is often glossed over, as a kind of hardware abstraction.
The process used for RAM and the process used for the cutting edge microprocessors are nothing alike, so it’s physically impossible to have the same piece of silicon have both DDR RAM and the CPU. You’re not really going to find a citation to something this well known. Literally every phone, for instance, has “unified memory” with the RAM die stacked on top of the CPU die, as well.
This question bothers me because I have never found a clear authoritative documentation.
The more detailed sources say, contra the mainstream impression, that Apple Silicon's vaguely-named "unified memory" is technically a hybrid System-on-Chip and System-in-Package architecture. The memory banks DRAM are on a second die (one source said it is made by Samsung), but the RAM controller sits on the CPU die and manages the RAM for the unified memory pool for graphics/main/neural memory usage (hence, "unified" from an ISA perspective). Both IC dies coexists on a shared enclosed package as a single microchip. Technically this is still called a System-on-Chip architecture according to Wikipedia because the electrical engineering definition allows for some parts, such as RAM or I/O, to still exist separately off the main piece of silicon die yet still be called an SoC architecture. In short, it is not a monolithic SoC.
I have tried several times to find citations about this but it is an ambiguous point that is often glossed over, as a kind of hardware abstraction.
No, they're regular LPDDR dice from one of the big manufacturers that are mounted on the same package as the SoC.
Is there a citation for this? I've found that the majority of Google searches tend to gloss over this hardware detail.
The process used for RAM and the process used for the cutting edge microprocessors are nothing alike, so it’s physically impossible to have the same piece of silicon have both DDR RAM and the CPU. You’re not really going to find a citation to something this well known. Literally every phone, for instance, has “unified memory” with the RAM die stacked on top of the CPU die, as well.
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You can physically tell from how the chips look like.
https://www.ifixit.com/Guide/Mac+Mini+(2024)+Chip+ID/178986
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