Comment by LarsDu88
21 hours ago
The open weight, open architecture releases of the past several days has me more convinced that ultimately, the winner will be whoever burns their models to ASICs fastest.
The LLMs themselves are capable of doing some aspects of chip design as evinced by the K3 press release.
Furthermore, the frontier models are "good enough" for a wide swathe of tasks and will soon hit that threshold for a good amount of software engineering (if not already). Does anyone think we need a Mythos level model to plan a road trip, or give someone tips on making a cake recipe?
A Fable 5 model running at 9,000 tokens/s on an ASIC rather than 150 tokens/s on electricity chugging Nvidia GPUs, or even giant SRAM Cerebras or Groq chips could be good enough to meet the majority of demand.
Furthermore, if you're an enterprise the risk of data exfiltration and feeding data to a potential competitor like OpenAI or Anthropic is greatly reduced if you could shift to on-prem ASIC deployments. A handful of chips could cover a wide variety of use cases and cover them more securely. There are a lot of corporate use-cases for LLMs that are not frontier math research or coding.
I'm not convinced, mostly because things like crypto, which I believe went into ASICs, were based on very slowly moving and mostly understood algorithms. LLMs and model architectures seems significantly more volatile. I wouldn't want to be working out the finer details of my chip rollout only to find a new paper/approach that give multiples of performance.
So I guess it depends on how much the latest-greatest model motivates people, and my read on the current churn is that developers are extremely unloyal to brand at this point and will jump to whoever has the best model. And as long as the best model is running on programmable GPUs, that will be the dominant form.
The tokens per second performance numbers coming from Cerebrus/Talas are several orders of magnitude higher than models running on GPUs, which is such a huge step change that it will enable many more uses of LLMs that are impractical otherwise. I.e. think about gamers and burning in an LLM chip on a game console like a future Play Station - it doesn't matter if its a frontier LLM if it allows them to talk to in game characters in real time and have the LLM drive the storyline. The devs may be limited to training/RLHFing legacy models, but the performance enables many more use cases.
I admit I would like a faster model - but even though I have faster models available I still go to Fable or GPT-5.6 90% of the time. So there is a gap between a potential preference and a revealed preference.
Custom AI for things like facial recognition in cameras has existed for decades, before LLMs were a thing. I don't see that getting replaced. And on-device conversational intelligence might go that route as well, we'll have to wait and see. It's a lot of silicon to dedicated to a static non-changing thing. My money would be on programmable TPU-like things (Apple's NPU kind of stuff). It just seems more flexible to have an array of compute that you can load different models into, so you can update it, etc.
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I don't think ASICs is the long term answer here at the local LLM level. I think GPUs will still be.
If you can have only one AI processor in your laptop (because they're big and expensive), it's going to be a GPU. This AI processor needs to inference LLMs, audio processing, image generation, video generation, etc. This is on top of normal graphics processing requirements such as video games, playing videos, decoding, encoding, etc.
At the enterprise level, I can see some ASICs working once the market fully matures and improvements in architectures slow down drastically while demand for inference increases drastically. How far are we from this world? Maybe 5-10 years? It seems like model architectures are still changing rapidly and labs want fast experimentation that programmable GPUs offer.
GPUs will still dominate in general - just like how CPUs still dominate despite ASICs.
The models would have to get significantly better for this to help, though. Unedited LLM dialog is quite bad. Though, I wouldn't put it past AAAs to try anyway.
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> Cerebrus/Talas
They are fast, but they're still programmable accelerators, not a model burned into the gates.
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Honestly, whether you think burning current SOTA to hardware is an overinvestment risk depends on what your definition of intelligence is. If you think intelligence is something that can grow like height such that 18 months from now we will basically be bowing down to machine god giants that are running on B200s, then investing in ASICs is the wrong move. However, if you you subscribe to the (very reasonable view) that intelligence is more like a round ball that we are trying to make as spherical as possible (ala Francois Chollet's writings), then at some point the ball will be smooth enough for most people and many tasks.
It takes about 18 months to go through the design, verification, and manufacturing process if you move at breakneck pace. Design could probably be sped up.
About 18 months ago the top model was GPT-4o. Not great by today's standards, but still good enough for many tasks (certainly a big chunk of chatbot queries). The current SOTA covers far more use cases, but importantly at a level that surpasses many thresholds of utility.
I think part of this thinking is in reverse. What I mean by that is people are saying something like "Imagine if 18 months ago a company started to create an ASIC based on GPT-4o (or whatever was good at the time). By today they'd have a model that is not great by today's standard but good enough".
Maybe, but what is the shelf-life of that 18 month decision? Barely good enough today, when it launches, starts to get worse and worse every month going forward. You have to recuperate that investment on your depreciating asset.
And you are competing against anyone with the foresight to use a TPU instead, and the benefit from any new paper that finds how to distill, quantize or whatever better so their solution gets algorithmic boosts while you are locked in.
At a 50-100x speedup even a GPT-4o class model could perhaps compete with much newer models simply by thinking deeper, doing harness-controlled Ralph loops, etc. Sure, then it might be "only" ~2-5x faster, but, you wouldn't need to throw all the ASICs into the trash bin.
One could also imagine hybrid models, where part of the model is burned into ASICs and part of the model exists in VRAM/HBM2 so it can be updated.
I don't have enough low-level knowledge to evaluate the technical or economic feasibility of the above ideas, however.
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>I'm not convinced, mostly because things like crypto, which I believe went into ASICs, were based on very slowly moving and mostly understood algorithms.
Yesterday there's a news on a breakthrough for probabilistic computer with 1 million p-bits [1].
Since LLM is stochastic in nature, this type of new computer can be much better than ASIC for processing LLM data.
[1] Biggest Probabilistic Computer Turns Noise into Answers:
https://news.ycombinator.com/item?id=48971938
Except LLMs are not stochastic in nature. Correct me if I am wrong, but it's just the final layer which outputs a distribution across the output tokens. In reality, the rest of the model is deterministic.
This is not like a bayes model or something were it's distributions all the way down.
The churn is an issue. For a while there, it felt like we were getting a new number format every month or two (e.g., fp4, ternary, etc.). That level of innovation works against moving things into hardware, or at least you need to be willing to spin hardware constantly.
Even then... Do we now stop the with to asic DeepSeek and do k3 instead?
Assuming such work was happening.
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I thought about the volatility, too. But here are some additional thoughts:
Many AI uses are not that volatile. I had a 20 minute conversation today with some company's AI phone assistant. It was extremely good and would have been very helpful if any of the dozen people it tried to route me to would have picked up their phone. That AI won't need to be upgraded for a very long time. There is no reason for it to have a cloud brain except to force a recurring revenue for the company selling it.
Hardcore gamers are constantly throwing down insane money on the latest hardware. The rest of us can get by for a couple years with whatever we bought when the last one broke. Yeah, it's not the latest, but it gets the job done. I wonder if AI has not already reached the point where a gen 10 CPU--uh, I mean a v3 AI model--will get the job done for the next year. If I really need the up-to-the-second latest abilities for a minute, I can fallback to a cloud brain @ 1M tokens/$. Why pay a monthly lease on a 5-year plan for a 4-door Ford Ranger as your daily commuter? Buy a Clio and rent an F-250 twice a year when you need the hauling/towing capabilities.
I think the gamble comes down to how many tokens need to be served on your best model, versus how many can be served in the cheapest/fastest way.
Imagine if Anthropic could give effectively unlimited access to Sonnet, for $20. Wouldn’t that be an appealing option for many users? I know I’d make a lot of use of it for agentic tasks, office work, summarization, etc; when right now I’d save quota for more important tasks.
I mean, if I imagine Anthropic giving away unlimited Sonnet 4.5 away at $20, I would still be paying the $200 for fable.
It is a bit like saying "why would you hire someone with a doctorate when you could get unlimited high school grads". How appealing that sounds depends on your needs.
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seems to me that we are at the asymtote for most usage. sure run the prompts that need the frontier on generic silicon but burning the fable 5 model into silicon could be perfectly viable
Apparently Google and team will build ASICs to run Gemini even though they have TPUs and it’ll be somewhat dynamic since the weights can be made modular [1]
[1] https://finance.yahoo.com/technology/ai/articles/google-plan...
640K ought to be enough for anybody.
Agreed 100%. This guy thinks there's a limit on the demand for intelligence. You think that Fable 7 which can run a billion dollar corporation on its own has no consumer demand just because we have fable 5 at 9k tok/s? Who do you think will be the biggest customer of such a model? Fable 7, obviously.
Sorry, which billion-dollar corporation is Fable running "on its own"?
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Of course not. But many tasks won’t require Fable 7 level intelligence and many people won’t want to pay for it. Honestly, I’m using Deepseek v4 Flash a LOT lately to do more mundane tasks because it’s so nearly free and I don’t need Fable or even Opus. Serving those mid-level models at high speeds and low prices is a definite winner for lots of applications. And sure, the frontier models will continue to drive the frontier forward.
theoretically theres a no limit on the demand of anything if the price is right
pretty stupid statement lmao
Certainly there will be demand for Fable7, but that demand is context specific. Frontier labs' profit is dependent on there being sufficient demand for the next layer of capability and whether the premium consumers are willing to pay for that.
The incremental unlock of capability by ever increasing frontier model sizes will eventually reach diminishing returns.
I would argue tnference speed increases would actually unlock a different kind of more meaningful value for a wider audience.
I am really confused about the point you're trying to make. 150tok/s is slow, but so is 9000tok/s? Or they're both fast? Or 150tok/s should be enough?
The "640k should be enough for anyone" quote (even if Gates didn't exactly say it) is making the point is that _right now_ we have no idea about what our future needs and capabilities will be, we can't imagine what "should be enough" will be
640k was enough ... in 1981 ... almost fifty years later is 50,000 lower than a standard off the shelf PC now
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probably no number you come up with will be adequate for very long. [edit] it's a reference to this possibly apocryphal prediction https://www.computerworld.com/article/1563853/the-640k-quote...
> 640K ought to be enough for anybody.
I get this reference!
> Does anyone think we need a Mythos level model to plan a road trip
Yes. The latest OpenAI and Anthropic models are terrible at planning roadtrips.
This is something I try to use them for frequently. They constantly get things completely wrong.
I’d say that about half of the stops they suggest fail to follow whatever filters I’ve asked for.
Fable is a pretty crappy general purpose LLM. It reminds me a little bit of GPT 5.2, in that it sometimes gets argumentative and deceptive after being caught in a mistake, and it tends to make a lot of them when you ask for judgement calls. Opus 4.8 is better for that sort of thing, or Opus 4.6 if it's important that it actually follow all of your instructions.
And this is one of the big things that seems to be missed in these discussions: There is no longer a universal linear trend of LLMs being 'better' each iteration. They are becoming more specialized, and ones that approach problems from a different angle (like Fable/Mythos) can appear breakthrough when first released, but we don't appear to be on a path that actually leads to general purpose hyper intelligence.
There never was a path.
It was nonsense to draw in investment and justify an inflated valuation.
lmao
> Does anyone think we need a Mythos level model to plan a road trip, or give someone tips on making a cake recipe?
This is starting to look at a lot like Intel vs Arm from the last era.
The Fable & Mythos are starting to look like a giant Xeon, while the smaller lighter models are starting to look like a lot of tiny ARM chips which sip on power instead.
The risk is the same as what Intel had. There is a group who are pushing them to go bigger and with a resource no limit approach, who have a lot of dollars to push you that way.
Follow them and they lead you to a pile of money, but then you risk something like Apple Silicon happening.
Something which got better because of efficiency & continuous improvement, not neutered due to it.
> The risk is the same as what Intel had. There is a group who are pushing them to go bigger and with a resource no limit approach, who have a lot of dollars to push you that way. Follow them and they lead you to a pile of money, but then you risk something like Apple Silicon happening.
The problem was that Intel stopped making things faster and better, and shifted to wearables and mobile chips instead of investing in their hard-tech strategy that had worked for decades.
Except aren’t these Chinese models having to go big too? While they might not be Mythos/Fable sized, a trillion plus parameters is hardly a local server or even desktop to mainframe style jump
I've had 2b models give a plausible Paris vacation itinerary. A tools-capable 12b and especially 30b model from 2026 is certainly capable of producing passable results. I was demonstrating the qwen 3.6 27b model I stood up last week to my wife and it gave her a passable Moroccan Chicken recipe. With tool calling (search) they're quite good.
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> whoever burns their models to ASICs fastest.
There is already custom hardware see cerebras.
GPUs have a lot of slack there is at least one lab that had a (small 8b) model generate almost 3000 tokens per second on a MI300X for a talk, instead of the typical software stack that did maybe 100ish tokens per second.
High bandwidth flash storage is in the works, i.e hard drives with TBs of storage and over 1 TB per second of read speeds. Meaning that in a couple of years you may be able to buy a card with 40-90GBs of HBM and 4TB of HBF and run a 3T model locally at a reasonable speed for 10-20k as opposed to a cool mil.
> Meaning that in a couple of years you may
There is no "may" here. You will see this.
It's always difficult to see it from the present, but we're not at some end stage in hardware development; we're still on the same curve our predecessors also couldn't see: they couldn't imagine that there would be high performance computers carried in our pockets, with staggering amounts of storage and compute, putting to shame the machines they filled rooms with.
Oh yeah the may is on the 2 year time horizon. It could be 3 or 4. Or next year.
https://taalas.com/
> the winner will be whoever burns their models to ASICs fastest.
It'll obviously be China, and they won't need the bleeding edge of lithography tech to make it happen. Every Chinese smartphone will have something like Sonnet 5, along your car (well, not those of us in the US, but we'll look longingly at pictures of them while we drive whatever the government decides we're allowed to drive in Fortress America).
Give it ten years and your smart litterbox from Temu will be running its own local model.
China won in desktop PCs? Nope.
China won in cloud services? Nope, not even close. They had to clone AWS just to try to keep up.
China won in mobile? Nope. Although they're very competitive there.
China won in search? Nope. Baidu who?
China won in ecommerce? Nope. Their dominance is overwhelmingly domestic.
China won in software? Nope. Windows is US. Android is US. iOS is US. MacOS is US. Linux is US/Europe/Global. Look at the top 50 largest software companies.
China won in silicon? Nope. Look at the top 50 companies.
China won in .... India and Latin America can manufacture iPhones now.
But sure, China's the obvious winner this time. Good luck.
While running the model at 9000 tokens/s is the more flashy demo, I imagine running 1000 concurrent requests at 150 tokens/s each is the much more achievable goal
At 9000 tokens/s you could interleave a lot of requests so long as pre-fill is also fast. It really depends on how much you need to keep sessions open to take advantage of KV caching
It depends. If I was running a model locally I would much prefer 9000 t/s. If I was running an inference company, obv 1000 concurrent requests at 150 t/s is preferable.
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My gut is that, at least for now, there's a timescale mis-match problem. Hardware still takes too long, then you have to deploy it. I don't know much about "burning asics", but if the whole process of spinning up programmable GPU data centers is months, I imagine the whole ASIC cycle has some catching up to do. To be clear, by timescale mismatch I mean model quality improvement timescale vs. deployment timescale. But maybe we're finally getting to the point where behind-the-frontier-but-cheaper are in sufficient demand and ASICs make it cheap enough to close that gap.
If Qwen 3 Coder were available as a PCI card I could just slot into my desktop, and the software on the system could recognize the card and still work with other cards should I decide I later want to upgrade to Qwen 5 or whatever, and at a three figure price point, I imagine it would do quite well.
The comparison I've seen elsewhere is the old console systems with separate cartridges for games... I wouldn't want to be regularly swapping them, but if they came out in a form factor that didn't require me to shell out multiple-4 digit figures in upgrades just to use the next model, it'd easily be worth it for me.
I've already got a home lab, and it's specced to last, minus the GPU. I picked up a separate system for local llm experimentation, but I'm not likely to be upgrading it again. The value add is incredibly small compared to the cost. The real benefits are data privacy and never worrying about rate limits, and there's a price point beyond which an incremental improvement to the model doesn't justify upgrading the system.
Wow having it as a PCI card would be awesome. I don't know the feasiblity but it would be really cool. Ordering different models, back to physical media basically...
I'm convinced there is a Transmeta/transpiler solution somewhere between 9000 t/s ASIC and Nvidia GPUs. LLMs fit the model much better than what they were trying to do with general purpose in the 2000s.
The field is moving too fast for it to make sense. ASICs have a 12-24 month development cycle and you’d have to throw them in the trash 4 months later.
If this approach doesn't include a way to apply updated finetunes on a daily basis (also without going back to VRAM being the bottleneck) then the trash interval would be measured in hours, not months
We're getting new models every three months. They'd have to work quickly to get those chips made and installed.
They require a lot of computation regardless of whether this will take place on ASICs. China can do it, even if the chips are not the most power-efficient. They have built lots of electricity capacity.
Ultimately however, that just means that models will become dirt-cheap. The money will be made with applications built on top of the models.
Yeah, I have been thinking exactly the same. Makes all the sense in the world and is inevitable as far as I can see.
https://news.ycombinator.com/item?id=48464958
> the winner will be whoever burns their models to ASICs fastest
As of today, that appears to be Google!
https://news.ycombinator.com/item?id=48986351
I think the SotA is moving too fast for the production timelines of an ASIC, wouldn't you think? People are just now coming out with LLAMA ASICS but who would want to use LLAMA? Or I guess you are arguing that the models _now_ will be durably useful enough to commit the time to creating the ASIC?
Objectively, the current frontier-ish models will be useful for some time. Imagine the zombie apocolypse hits, recedes, and you need to rebuild society. An offline copy of Fable or even Opus would be a nice thing to have.
Subjectively, it's hard to say if people will pay for "a model from 18 months ago, but REALLY FAST AND CHEAP"
The speed difference suggests some use cases that might narrow the performance gap. With a > 50x performance delta you have some headroom to play with.
You can do many many fast iterations of ye olde "Ralph loops." You can also jack up the reasoning/effort level. And you could probably do some combination of both, while still running really fast ie 10x the number of iterations at 2x reasoning/effort.
So I think a hypothetical "50x faster Opus 4.8, but burned into ASICs" could be pretty competitive against the frontier models from 2027, 2028, 2029, and maybe beyond?
I dream of some kind of "adjustable" ASIC layers, that have the most "computation demanding" layers as ASICs plus a bunch of configurable R+W circuits (FPGAs?) that can be written to upgrade the models to some extent.
What's fascinating is that we are pushing the state of the art of hardware at this point.
Fun as the asic play would be it has a giant hole - context storage. Raw speed only gets you so far if you can’t store and cache
> the winner will be whoever burns their models to ASICs fastest.
I don't understand how this works when the models are evolving so fast that your burned ASIC is outdated (or at least not top of the line) in a few weeks.
If llama 3 70b were available for $400 today, people would make it work. They would have 4 of them working side by side or 1 of them working with a GPU on another model.
To me, it's like imagining if Sonnet 3 was burned into an ASIC 8 years ago and then never changed. It would still be revolutionary, and today we would have an entire ecosystem of tools and services built around it, likely surpassing some of our current workflows.
The frontier is a different beast, but it would likely mean competing on price.
I think you'd be better off getting 1% of a $40,000 card. Or maybe 10% of a $4,000 card is more realistic.
I think that's the problem at the moment. A much better LLM that doesn't use my battery is 20ms and <10mb of data away.
for many purposes they're good enough now. If I had an opus 4.8 class model on a box next to me that could produce tokens at rates like 5000/s, i don't know if i'd need a new one for a long time. I think we might be underestimating how powerful very very fast LLMs could be, since they could iterate on tons of small variations on tasks. paired with deterministic guardrails that gate "doneness", you could loop on tasks for a long time having the agent try different strategies until the goal was reached, in ways that are just impractical now (and very expensive)
Exactly. A fast, cheap model, particularly with the right harness and loops, might take us a lot farther than we might guess.
I think it makes more sense if you think about an ASIC pipeline which is updated on an annual basis, like Apple's M or A-series chips.
Sure, an ASIC model will always be behind (12 months? 18 months?), and a hosted flagship will be significantly better. But as time marches on, would I use a flagship model from last year if it came on a PCI card and cost $1000? Without a shadow of a doubt.
Sol is running on Cerebras right?
Cerebras is not an ASIC. It is a large wafer scale chip that has a load of small SRAM modules paired with tiny compute models. The SRAM is basically a giant cache that is supposed to eliminate the bottleneck between shuttling and materializing big tensors between DRAM and cache, but the actual amount of SRAM is still nowhere near enough to server a frontier model on a single wafer. You still need dozens of wafers, which makes Cerebras rather cost intensive given that Nvidia can get dozens of GPUs out of a single wafer
How does an ASIC manage to have 60x the memory bandwidth needed to achieve that speedup?
Currently the setup is paged view in RAM shuttled to HBDRAM (VRAM) on the GPU, which in turn has to get materialized piece by piece onto cache SRAM on the GPU.
Cerebras tries to get around this by keeping everything on cache SRAM as much as possible, which it burns directly to the chip wafer itself and physically places that SRAM directly next to the tiny compute unit that does the actual math.
An ideal setup (not sure how easy this is to achieve in practice), is the burn the weights of the model directly to the chip as a sort of ROM, the actual math operations as actual digital circuits, and have SRAM, or even something akin to naked registers to directly compute off inference batch data. Cuts out 2-3 layers of abstraction and indirection.
I assume ROM would be even more expensive than SRAM?
You don't need memory because the output of the previous layer flows directly into the input gates of the next. So no I/O to/from HBM or similar
You still need some memory for the context, in flight answers, ... but not for the model weights and for the output of the intermediate layers. I found taalas demo here: https://chatjimmy.ai/
why not start with fogas ? you know … to test the waters ?
GPUs are already ASICs.
Apple's M7 comes to mind...
Another reason this may be true, selling hardware may be the only durable moat after a while
is anyone doing this ?
The closest example I've seen is ChatJimmy: https://chatjimmy.ai/ a prototype from Taalas running Llama 8B
Scaling this up to 2.8 Trillion (350X increase), will certainly be challenging.
If I was younger and had the right background, I'd love to dive into attempting somethign like this
Also a 3-bit quant. Useable but a long long way away from useful.
News just broke today that Google is planning on doing this: https://news.ycombinator.com/item?id=48986351
Taalas HC1 is the closest thing to this.
Last I saw they posted Deepseek R1 numbers in Feb of this year.
The challenge is rolling out a new one every 7-8 weeks as the weights change & cheap enough for a hyper scaler to afford to buy one and save enough on power over the next 8 weeks as a payoff.
not sure about that, but im actively working on designing ultra sparse models that i want to have perform competitively with stuff 100-10_000 times larger. ehich does yield similar throughput. time will tell id it works out
Yeah, I've heard of Taalas doing it. Not sure of others but I'm sure lots of companies are considering it, especially as we start to hit points of depreciating returns in training.
There was a startup that did this for Llama 3, I forgot their name. Etched is also doing some similar things I believe.
obligatory link to https://chatjimmy.ai
It sounds vaguely similar to what Cerebras.ai is doing
Open weights are a red herring if you can’t run the model independently. Good luck fitting these models on your Mac mini.
In fact the superior models are irreducibly nothing but superior web services run from China.
Did you not notice that there are inference providers running all the various Chinese open weight models in the US and EU?
Nobody needs "web services run from China" to use Chinese open weight models.
What precisely is an ASIC supposed to do that a more programmable accelerator can't? Memory latency is memory latency: doesn't matter whether it's embedded in a cache-line wait state or some flipflop state machine. ROM isn't going to be faster than RAM either.
Likewise, for compute, is the ASIC somehow going to beat a systolic array? You can't have one circuit per weight: the die area and electrical fan-out would be insane. I'm not seeing how an ASIC specialized for a specific model would actually help much.
I mean, sure, we can build more specific accelerators, e.g. for softmax, but these work fine in the context of a programmable pipeline.
Yes, there are more exotic things out there, like optical matrix multiplication systems. Those are different. But above, aren't you talking about just doing conventional digital linear algebra, but with a model-specific set of circuits?
No, if you burn your model into the silicon you don't need memory as the output of a layer flows through circuitry directly into the next one. No I/O to memory of any kind. You still need a bit of memory for in flight answers, but that's it.
You can pipeline in software too, and even with a dedicated circuit, you need to put weights somewhere, because you're not going to have a special partially-applied FP8 FMA unit for each of your trillion model weights.
I can accept the idea of specializing a circuit for a specific model shape, but I'm not seeing a need to specialize a circuit for the weights inside the shape.
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