Cerebras is not an ASIC. It is a large wafer scale chip that has a load of small SRAM modules paired with tiny compute models. The SRAM is basically a giant cache that is supposed to eliminate the bottleneck between shuttling and materializing big tensors between DRAM and cache, but the actual amount of SRAM is still nowhere near enough to server a frontier model on a single wafer. You still need dozens of wafers, which makes Cerebras rather cost intensive given that Nvidia can get dozens of GPUs out of a single wafer
Cerebras is not an ASIC. It is a large wafer scale chip that has a load of small SRAM modules paired with tiny compute models. The SRAM is basically a giant cache that is supposed to eliminate the bottleneck between shuttling and materializing big tensors between DRAM and cache, but the actual amount of SRAM is still nowhere near enough to server a frontier model on a single wafer. You still need dozens of wafers, which makes Cerebras rather cost intensive given that Nvidia can get dozens of GPUs out of a single wafer