Comment by ricksunny

7 hours ago

Perhaps, and thanks for contributing that; and I'm not taking a position currently on this. But I've long been uncomfortable with the term 'random access' for random access memory (RAM) as it implies that the concept of 'randomness' is somehow a required and fundamental property of the memory technology described, when it's not. 'Arbitrary access' is a much more appropriately encapsulating description of the function of the memory at hand. Alas, the incumbency of terminology.

I agree with you about terminology.

Nonetheless, the programs whose performance is limited by the speed of the main memory can be divided in programs whose performance is limited by the throughput of the memory interface and programs whose performance is limited by the latency of the memory accesses.

The programs from the first class will have the same performance when using a serial memory or a RAM, if they are equally fast for sequential access, but for programs from the second class, it is important to have a RAM as the main memory, otherwise they would be very slow.

In order to measure the performance achievable by programs from the second class on a given computer, it is necessary to run a benchmark where the addresses of the memory accesses are generated by a good random-number generator.

The reason is that modern CPUs have a variety of hardware prefetchers that attempt to predict the next memory address, so for meaningful results that reflect the true performance of the memory you need truly random addresses that are impossible to guess by the hardware.

Thus nowadays the latency of the memory accesses of a RAM cannot be measured otherwise than with really random accesses and a memory chip must be designed to have a low latency even when successive accesses happen at unpredictable random addresses, not only when the accesses are at arbitrary addresses, but those can be predicted in advance of the actual accesses.

So there is an argument in favor of the term RAM, because random access is the worst possible case and the memory must still be able to handle it.