I welcome AI based PCB layout. Routing PCBs by hand is a tedious slog of educated trial and error. Essentialy the kind of tedious knowledge task like reverse engineering, that AI is very good at.
I have some friends who work on designing wafers and they told me compared to autorouting, hand layout is always better, with quality asymptotically approaching a certain ideal with hours invested.
Based on how many engineer-hours you can put in, you can get a single or even double digit increase in silicon density, it's just that nobody actually has the manpower to actually get close to that ideal, but the difference is very noticeable between 'tier 1' and 'tier 2' manufacturers, the former of which can afford an army of highly educated engineers who will slog through this task, with the latter having to decide where to spend the effort.
This is one of the reasons why second or third generations of CPU architectures perform better even on the same or very similar process node, because this logic optimization builds up.
To me the routing is the fun part. It's the main part of PCB design where I can actually get into a flow state, because it stops being a bunch of part searches and starts becoming a neat self-contained and fairly verifiable problem. I've often suspected that the resistance to autorouters is half their UI kinda sucking and half engineers not wanting to cut out the fun part.
I welcome AI based PCB layout. Routing PCBs by hand is a tedious slog of educated trial and error. Essentialy the kind of tedious knowledge task like reverse engineering, that AI is very good at.
I have some friends who work on designing wafers and they told me compared to autorouting, hand layout is always better, with quality asymptotically approaching a certain ideal with hours invested.
Based on how many engineer-hours you can put in, you can get a single or even double digit increase in silicon density, it's just that nobody actually has the manpower to actually get close to that ideal, but the difference is very noticeable between 'tier 1' and 'tier 2' manufacturers, the former of which can afford an army of highly educated engineers who will slog through this task, with the latter having to decide where to spend the effort.
This is one of the reasons why second or third generations of CPU architectures perform better even on the same or very similar process node, because this logic optimization builds up.
To me the routing is the fun part. It's the main part of PCB design where I can actually get into a flow state, because it stops being a bunch of part searches and starts becoming a neat self-contained and fairly verifiable problem. I've often suspected that the resistance to autorouters is half their UI kinda sucking and half engineers not wanting to cut out the fun part.