Comment by adolph

16 hours ago

Interesting. Since this was implemented on the S3, which uses the ISA XTensa LX instead of the RISC-V of most newer ESP32 series chips, I looked into how Espressif is handling SIMD on the latter ISA. Apparently it is only present in limited fashion as a processor extension on the P4 and S31 [0]. The S31 datasheet claims SIMD [1] and the P4 datasheet [2] files them as "Processor Instruction Extensions."

0. https://bitbanksoftware.blogspot.com/2026/04/esp32-p4-simd-e...

1. https://documentation.espressif.com/esp32-s31_datasheet_en.p...

2. https://documentation.espressif.com/esp32-p4_technical_refer...

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adolph

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topspin  6 hours ago

It's all kinda sketchy with Espressif. They do not hesitate to ship hardware prior to publishing comprehensive documentation. The complete P4 TRM documentation for the PIE extension didn't arrive until June 2026, although it's been possible to buy P4 dev boards for roughly two years.

They also don't hesitate to signal "mass production" availability while they're still working out substantial errata. Espressif will ship the moral equivalent of "engineering sample" silicon (no, they don't call it that) for early use by their supported customers, and eventually iron out the bulk of the issues in later silicon.

Espressif applies the "release early, release often" model of open-source software, but for silicon, and I love them for it. But it does create pitfalls for early adopters that don't understand the game.

So the big hole in ESP32-S31 SIMD documentation (literally "Coming soon"[1]) isn't surprising, despite the fact that you can buy official and third party dev boards right now.

[1] https://esp32-s31.espressif.com/en/docs/9-Technical%20Refere...