"TSMC does not have an advanced packaging facility in the U.S., and its partner Amkor will only start packaging chips in Arizona in 2027. As a result, Blackwell AI silicon produced in Arizona will need to be shipped back to Taiwan for final assembly, as all of TSMC's CoWoS packaging capacity remains in Taiwan."
Given that there may be a 25% chance that China invades Taiwan by 2030, having the ability to package SOTA chips in the US by 2027 seems "soon enough".
"Packaging" in this context means taking the wafer of compute die (made in Arizona), dicing it up into individual die, mounting it onto a silicon interposer (an even bigger die, no idea where that's made, but probably taiwan) along with a bunch of HBM die, then mounting that Si interposer on a somewhat larger, very fine-pitched circuit board ('substrate') that is essentially a breakout for power and high-speed I/O from the compute die. That thing is the packaged 'CoWoS' system, where CoWoS==Chip-on-wafer-on-substrate, that eventually gets attached to a 'normal' PCB.
What I've always wondered was, how is it possible to do this process (or well, the less advanced version of it, for smaller/older chips) cheaply/at massive scale, for those ICs that cost a few cents in bulk?
Like, scaling wafer (die?) production to insanely low costs makes intuitive sense. The input is sand, the process itself is just easily-parallellizable chemistry and optics, and the output is a tiny little piece of material.
But packaging sounds as though it requires intricate mechanical work to be done to every single output chip, and I just can't wrap my head around how you scale that to the point where they cost a few cents...
This sounds like a complex procedure. Are there currently alternative packaging facilities that could do this work, if Taiwan were locked into kinetic war?
I'm making an educated guess but probably the cutting of chips from the wafers, placing them into the appropriate ceramic socket types (DIP, BFGA, SMD etc), soldering the line wires from chip to pin, encasing the chip, etc.
I am happily imagining opening a recent Apple device and seeing 74 gates with through holes in green PCBs, with an Apple logo made in soldering lead marking in the corner of the board.
I believe packaging in this context means taking the raw silicon dies and assembling them into a package which can be soldered onto a PCB (or put in a socket, but Apple doesn't socket anything).
The machines and processes needed to package the individual integrated circuits are fantastically expensive but the margins are so low in that step that it's only profitable at massive scales.
So you put the fantastically expensive machines near where most of the customers are and most of the customers are in Asia.
Works the same way with fiber optic cables. Making the long skinny bits is hard and high-margin. Actually turning them into cables is easy and low-margin.
So Corning makes huge spools of fiber optic cable in Arizona, North Carolina, and New York (I think) and ships it off to Taiwan and China where it is made into the cables that you plug into stuff.
Marine shipping is just about the most fuel efficient way of moving things between any two places, by a lot. A 100,000 dwt ship can get 1050 miles per gallon per ton of cargo. It takes about a teaspoon full of fuel to move an iPhone sized device across the pacific when I ran the numbers last.
To ship things to/from these fabs by sea you have to add the cost of shipping by truck between Phoenix and (presumably) LA. Not sure how big of a difference that makes.
Plus, chips are small in size and cost a lot so you can fit a lot in a container. Per unit shipping costs probably come out to be pretty low. Especially when compared to the political costs and risks associated with not onshoring.
Your overall point is probably right, but "tens of thousands of dollars of value in each gram" seems like an exaggeration. How much does one CPU weigh?
I'm suprised they can't ship (flat) packaging that could be used in Arizona with a simple assembly line.
If they had that packaging design then for this to make financial sense the two way shipping (and loading, unloading, custom clearance etc) would have to be less than shipping the packaging, the setup cost per unit cost of putting the chip in a box
Wait, wait. In the context of semiconductor manufacturing packaging does not mean what you think it means. It is not putting the product in a paper box.
It is about cutting the wafer into individual chips, wire bonding the silicone to pins, and covering the whole thing with epoxy.
Until 2027, yes.
https://www.tomshardware.com/pc-components/gpus/tsmc-is-repo...
"TSMC does not have an advanced packaging facility in the U.S., and its partner Amkor will only start packaging chips in Arizona in 2027. As a result, Blackwell AI silicon produced in Arizona will need to be shipped back to Taiwan for final assembly, as all of TSMC's CoWoS packaging capacity remains in Taiwan."
Given that there may be a 25% chance that China invades Taiwan by 2030, having the ability to package SOTA chips in the US by 2027 seems "soon enough".
Would be interesting if China uses drones with technology from Taiwan to invade Taiwan.
where did you get that number from
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what is involved in the packaging process ? I believe they don't ship fully assembled chips to Taiwan only to be put in a pretty box ?
"Packaging" in this context means taking the wafer of compute die (made in Arizona), dicing it up into individual die, mounting it onto a silicon interposer (an even bigger die, no idea where that's made, but probably taiwan) along with a bunch of HBM die, then mounting that Si interposer on a somewhat larger, very fine-pitched circuit board ('substrate') that is essentially a breakout for power and high-speed I/O from the compute die. That thing is the packaged 'CoWoS' system, where CoWoS==Chip-on-wafer-on-substrate, that eventually gets attached to a 'normal' PCB.
What I've always wondered was, how is it possible to do this process (or well, the less advanced version of it, for smaller/older chips) cheaply/at massive scale, for those ICs that cost a few cents in bulk?
Like, scaling wafer (die?) production to insanely low costs makes intuitive sense. The input is sand, the process itself is just easily-parallellizable chemistry and optics, and the output is a tiny little piece of material.
But packaging sounds as though it requires intricate mechanical work to be done to every single output chip, and I just can't wrap my head around how you scale that to the point where they cost a few cents...
This sounds like a complex procedure. Are there currently alternative packaging facilities that could do this work, if Taiwan were locked into kinetic war?
I'm making an educated guess but probably the cutting of chips from the wafers, placing them into the appropriate ceramic socket types (DIP, BFGA, SMD etc), soldering the line wires from chip to pin, encasing the chip, etc.
> DIP
I am happily imagining opening a recent Apple device and seeing 74 gates with through holes in green PCBs, with an Apple logo made in soldering lead marking in the corner of the board.
I believe packaging in this context means taking the raw silicon dies and assembling them into a package which can be soldered onto a PCB (or put in a socket, but Apple doesn't socket anything).
Believe it or not, sending them overseas just to be put in a box actually can be cost-effective. Like with those pears: "grown in Argentina, packaged in Thailand, sold in UK" https://www.birminghamfoodcouncil.org/2022/01/16/part-i-pear...
I think "packaging" here refers to the process of putting the silicon die in its plastic casing and connecting the die's pad to the case's pins, see https://en.wikipedia.org/wiki/Integrated_circuit_packaging
https://www.youtube.com/watch?v=-egYoxajTz0
How does this make any financial sense?
The machines and processes needed to package the individual integrated circuits are fantastically expensive but the margins are so low in that step that it's only profitable at massive scales.
So you put the fantastically expensive machines near where most of the customers are and most of the customers are in Asia.
Works the same way with fiber optic cables. Making the long skinny bits is hard and high-margin. Actually turning them into cables is easy and low-margin.
So Corning makes huge spools of fiber optic cable in Arizona, North Carolina, and New York (I think) and ships it off to Taiwan and China where it is made into the cables that you plug into stuff.
Marine shipping is just about the most fuel efficient way of moving things between any two places, by a lot. A 100,000 dwt ship can get 1050 miles per gallon per ton of cargo. It takes about a teaspoon full of fuel to move an iPhone sized device across the pacific when I ran the numbers last.
To ship things to/from these fabs by sea you have to add the cost of shipping by truck between Phoenix and (presumably) LA. Not sure how big of a difference that makes.
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Interesting. Could you give a brief description of how you got that number? Eg. what factors were considered.
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This is how most modern supply chains look like.
Plus, chips are small in size and cost a lot so you can fit a lot in a container. Per unit shipping costs probably come out to be pretty low. Especially when compared to the political costs and risks associated with not onshoring.
> you can fit a lot in a container
Guys these are microchips on wafers. You can put a million dollars worth in your jacket pocket. They aren't being shipped in containers.
These are literally microchips. Tens of thousands of dollars of value in each gram.
Shipping cost is fundamentally irrelevant, you can put $100MM worth on a direct flight and have room left over for your family and friends.
https://www.freightwaves.com/news/dsv-unveils-details-for-ne...
^certainly there's activity in that space
Your overall point is probably right, but "tens of thousands of dollars of value in each gram" seems like an exaggeration. How much does one CPU weigh?
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I'm suprised they can't ship (flat) packaging that could be used in Arizona with a simple assembly line.
If they had that packaging design then for this to make financial sense the two way shipping (and loading, unloading, custom clearance etc) would have to be less than shipping the packaging, the setup cost per unit cost of putting the chip in a box
Wait, wait. In the context of semiconductor manufacturing packaging does not mean what you think it means. It is not putting the product in a paper box.
It is about cutting the wafer into individual chips, wire bonding the silicone to pins, and covering the whole thing with epoxy.
Here is a video which explains it better: https://www.youtube.com/watch?v=7gg2eVVayA4
It would be indeed crazy if they would ship the ready chips to Taiwan just to be put in a paper box.
basically the input of the process is a wafer which looks like this: https://waferpro.com/wp-content/uploads/2016/08/Patterned-Lo...
And the output of the process is something which looks like this: https://res.cloudinary.com/rsc/image/upload/b_rgb:FFFFFF,c_p...
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You seem to be confusing the term packaging...it is not the box, it is how the chips are assembled together to make the final product.
https://www.youtube.com/watch?v=-egYoxajTz0
Dont downvote the guy for not knowing this very specific definition of 'packaging'
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What does "packaging" mean in this context? I'm a total n00b when it comes to chips.
What comes to my mind is wrapping a piece of electronics in some bubble wrap and cardboard, which doesn't sound that hard...