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Comment by fooker

4 hours ago

What's the main blocker (other than the current inflated cost) for using HBM instead of DRAM as the primary memory for consumer electronics?

It's not that there's a blocker. It's that it takes roughly 3x the manufacturing capacity to produce an HBM package at the same storage capacity as DRAM. We are sacrificing total bytes for bandwidth.

  • I don't fully understand the source of the "total bytes" constraint, but a major factor may be because HBM4 / HBM4E can only make use of the footprint directly above the processor/logic die (or in direct vicinity of its interconnect), while traditional DRAM can be placed further away where there's lots of real estate on the motherboard.

    I gather a practical max ceiling today is a stack of 16 chips in height yielding 64GB?

    These chips have a massive bus size of 2048 bits, instead of the 64 or 128 bits (dual channel) used by DDR5. That's what gives them their order-of-magnitude bandwidth speedup. But even though they technically pack in more capacity per square millimeter of motherboard, I gather they take up more space than older technologies once you account for the vias and interconnects to route all those signals.

    • Thanks for that, just went down an interesting rabbit hole. Many of us were hoping this re-tooling would eventually trickle some fast RAM down to DRAM-exhausted PCs, but given it would require a rearchitecture of the motherboard it's unlikely.

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>> What's the main blocker (other than the current inflated cost) for using HBM instead of DRAM as the primary memory for consumer electronics?

HBM is meant to be integrated into the same package as the CPU, so no more DIMM sockets. It also has higher latency apparently.

I think people might prefer the lower idle power consumption from lpddr over the better bandwidth in hbm in battery powered stuff. That said right now the price is definitely preventing us from finding out.

Mainly bus width. Afaik HBM is like 1024 bits vs DDRs 64 so you need lots of transfers in parallel to saturate the bus, and CPUs kinda want 64 bytes of data as that's the size of a cache line ASAP. So you need a ton of in flight transfers which isn't a thing CPUs provide, maybe multicore workloads.

Buy the way you win with CPUs is with latency, and not bandwidth, which is why Apple M series actually uses DDR with lower latency because of the stacking.

Why would you want/need to?

The advantage of HBM over regular non-stacked DRAM is memory bandwidth, which also requires a super-wide memory bus - 2048 bits wide for HBM4. Compare that to the 128 bit wide bus of a modern CPU.

So to take advantage of it on the desktop, or anywhere else, you need that 2048 bit wide bus, and a processor capable of consuming 2-3 TB of data per second!

These are not normal requirements, other than for a GPU.

  • SIMD (and especially the modern matrix extensions) can use as much bandwidth you can throw at it.

    • Without further clarification, that statement seems impossible. "As much" being unbounded and all. You should expand what you mean.

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  • Right but if HBM memory is all that people want to produce, then building a CPU which can use it use it would be useful on it's own merits.

    But in reality we also already have unified memory architecture systems, integrated graphics etc.

In one sense, nothing, in another, everything. It is DRAM, but the bandwidth requirements mean it’s paired to a processor, i.e. no DIMMs. Not 100% sure but things like MacBooks and the Framework tower, where you have fixed RAM for the device lifetime, have ~0 tradeoff.

HBM is a stack of DRAMs, so there is no “instead”.

  • The vias to enable stacking is a significant amount of the die area.

    • If they're talking about production capacity, that is some product of die area and process steps, right? It doesn't have to be 3x die area, just 3x lower factory throughput for the same number of functioning memory bits.

Nothing except CPU manufacturer choices. Mac laptops use it and they're consumer products.

People will have to get used to buying a fixed amount of RAM with their CPU but thats unlikely to be a problem.

  • Apple's "unified memory" marketing is so strong that even tech literate people seem to have this misconception!

    They have managed to pull this sort of thing off many many times. https://en.wikipedia.org/wiki/Reality_distortion_field

    • Yup, the only reason Macs have higher memory bandwidth is because they use more memory channels, which gives them a wider bus. Both Intel and AMD only allow more than dual channel memory on server class processors these days.

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  • MacBooks use regular soldered lpddr5(x) RAM. Same RAM as every other laptop manufacturer, they just use more lanes to achieve a higher bandwidth.

  • > Mac laptops use it and they're consumer products

    No, Mac laptops use LPDDR, currently LPDDR5X.

  • The normal non-tech-savvy person already does this. They simply don't know that their ram is upgradeable or something else breaks first, before having to touch ram.

    • what is this too much RAM thing you mention? I thought the only valid RAM situation you could find yourself is not enough RAM. Too much? That's just fantasy